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CC1000

SWRS048A Page 23 of 55

14. Frequency programming

RX mode:

f

LO

(low-side) f

LO

(high-side)

f

RF

(Receive frequency)

f

IF

f

IF

TX mode:

f

RF

(Center frequency)

f

sep

f

0

(Lower FSK

frequency)

f

1

(Upper FSK

frequency)

f

vco

f

vco

Figure 15. Relation between f

vco

, f

if

, and LO frequency

The frequency synthesiser (PLL) is

controlled by the frequency word in the

configuration registers. There are two

frequency words, A and B, which can be

programmed to two different frequencies.

One of the frequency words can be used

for RX (local oscillator frequency) and the

other for TX (transmitting frequency, f

0

).

This makes it possible to switch very fast

between RX mode and TX mode. They

can also be used for RX (or TX) on two

different channels. The MAIN.F_REG

control bit performs selection of frequency

word A or B.

The frequency word, FREQ, is 24 bits (3

bytes) located in

FREQ_2A:FREQ_1A:FREQ_0A and

FREQ_2B:FREQ_1B:FREQ_0B for the A

and B word, respectively.

The frequency word FREQ can be

calculated from:

16384

8192+⋅+

⋅=

TXDATAFSEPFREQ

ff

refVCO

,

where TXDATA is 0 or 1 in transmit mode

depending on the data bit to be

transmitted on DIO. In receive mode

TXDATA is always 0.

The reference frequency f

ref

is the crystal

oscillator clock divided by PLL.REFDIV, a

number between 2 and 14 that should be

chosen such that:

1.0 MHz ≤ f

ref

≤ 2.46 MHz

Thus, the reference frequency f

ref

is:

R

EFDI

V

f

f

xosc

ref

=

f

VCO

is the Local Oscillator (LO) frequency

in receive mode, and the f

0

frequency in

transmit mode (lower FSK frequency). The

LO frequency must be f

RF

– f

IF

or f

RF

+ f

IF

giving low-side or high side LO injection

respectively. Note that the data on DIO will

be inverted if high-side LO is used.

The upper FSK transmit frequency is

given by:

f

1

= f

0

+ f

sep

,

where the frequency separation f

sep

is set

by the 11 bit separation word

(FSEP1:FSEP0):

16384

FSEP

ff

refsep

⋅=

Clearing PLL.ALARM_DISABLE will

enable generation of the frequency alarm

bits PLL.ALARM_H and PLL.ALARM_L.

These bits indicate that the frequency

1 2 ... 18 19 20 21 22 23 24 25 26 27 28 ... 57 58

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